Hsinchu, Taiwan, June 21, 2018 (GLOBE NEWSWIRE) — WHO: Andes Technology Corporation, the leading Asia-based supplier of small, low-power, high performance 32/64-bit embedded CPU cores, today announced that it will present in the TSMC OIP Theater during the 2018 Design Automation Conference. The company will exhibit its latest RISC-V CPU IP cores in booth 2658.
WHAT: Andes Technology Corporation Field Application Engineer, I-Tao Tsai will present” Taking RISC-V to Mainstream ASICs.”
WHEN: Andes FAE I-Tao Tsai will present Monday June 25th from 3:15pm to 3:30pm and Wednesday June 27th from 5:15pm to 5:30pm.
WHERE: Andes FAE I-Tao Tsai will present in the TSMC OIP Theater in TSMC Booth # 1629, during the Design Automation Conference, in Moscone Center West, 747 Howard St, San Francisco, CA 94103. To schedule a meeting e-mail email@example.com.
Andes Technology Corporation was founded in Hsinchu Science Park, Taiwan in 2005 to develop innovative high-performance/low-power 32/64-bit processor cores and associated development environment to serve worldwide rapidly growing embedded system applications. The company delivers the best super low power CPU cores with integrated development environment and associated software and hardware solutions for efficient SoC design.
To meet demanding requirements of today’s electronic devices, Andes Technology delivers configurable software/hardware IP and scalable platforms to respond to customers’ needs for quality products and faster time-to-market. Andes Technology’s comprehensive CPU includes entry-level, mid-range, high-end, extensible and security families to address the full range of embedded electronics products, especially for connected, smart and green applications.
For more information about Andes Technology, please visit http://www.andestech.com/
Jonah McLeod Andes Technology Corp. (510) 449-8634 firstname.lastname@example.org